/* Copyright (C) 2016 - IIT Bombay - FOSSEE

 This file must be used under the terms of the CeCILL.
 This source file is licensed as described in the file COPYING, which
 you should have received as part of this distribution.  The terms
 are also available at
 http://www.cecill.info/licences/Licence_CeCILL_V2-en.txt
 Author: Siddhesh Wani
 Organization: FOSSEE, IIT Bombay
 Email: toolbox@scilab.in
*/

/* THIS IS AN AUTOMATICALLY GENERATED FILE : DO NOT EDIT BY HAND. */

#ifndef __INT_INT16_H__
#define __INT_INT16_H__

#define s0int16i160(in)			sint16s(in)

#define d0int16i160(in)			dint16s(in)

#define u80int16i160(in)		u8int16s(in)

#define i80int16i160(in)		i8int16s(in)

#define u160int16i160(in)		u16int16s(in)

#define s2int16i162(in,size,out)	sint16a(in, size[0]*size[1], out)

#define d2int16i162(in,size,out)	dint16a(in, size[0]*size[1], out)

#define u82int16i162(in,size,out)	u8int16a(in, size[0]*size[1], out)

#define i82int16i162(in,size,out)	i8int16a(in, size[0]*size[1], out)

#define u162int16i162(in,size,out)	u16int16a(in, size[0]*size[1], out)

#endif /* !__INT_INT8_H__ */
